Reference Number: ADE-060411-338

Our client is a Nasdaq-listed fabless chipmaker.

Jobs Responsibilities
  • To be part of a new team involved in the development of Digital Video Broadcast (DVB) ASIC with complete software applications/solutions.
  • Design DVB ASIC from functional specification to delivery of full working ASIC.
  • Perform RTL design, verification, synthesis, static timing analysis and qualify gate level netlist for tapeout to third party foundry
  • Generate functional test cases for Test Development Engineers to convert to test vectors for production use.
  • Document the design and generate materials to be included in the datasheet.

Jobs Requirements
  • BSEE/MSEE with a minimum of 3+ years experience in front-end digital ASIC/FPGA design.
  • Strong knowledge with Verilog/VHDL using NC-Verilog /VCS/Modelsim is a must.
  • Good understanding and usage of Synopsys synthesis tool and Primetime is required.
  • Strong knowledge with high-speed ASIC design-flow and verification methodology.
  • Industry design experience for video and/or graphics, IP networking, and/or DSP applications preferred.
  • Relevant knowledge in digital video/audio broadcasting technology (DVB-T/H) is a plus.


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